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Normas DIN – AENOR
DIN IEC 93/110/CD:1999-12

DIN IEC 93/110/CD:1999-12

IEC 61523-2: Pre-layout delay calculation specification for CMOS ASIC libraries (IEC 93/110/CD:1999) (Text in English)

IEC 61523-2: Spezifikation von Verzögerungszeiten vor dem Layout von CMOS ASIC-Bibliotheken (IEC 93/110/CD:1999) (Text Englisch)

Fecha Anulación:
2013-06 /Withdrawn
Equivalencias internacionales:

IEC 93/110/CD (1999)

Relación con otras normas DIN:

Reemplazada por: DIN EN 61523-2:2003-06

Resumen:
The document specifies the delay calculation method for CMOS ASIC Libraries which contains cell based primitives and memories.
Das Dokument spezifiziert zur Berechnung von Verzögerungszeiten für ASIC-Bibliotheken, die aus Zellen basierten Primitiven besteht.
Keywords:
Application specific integrated circuits, Chips, Complementary metal oxide semiconductors, Data elements, Data representation, Definitions, Delay equipment, Delay state, Delay time, Electrical engineering, Electronic equipment and components, Example of calculation, Information technology, Integrated circuits, Libraries, Library elements, Mathematical calculations, Metal oxide semiconductors, Methods of calculation, Prefabricated, Printed circuits, Semiconductors, Specification, Stores
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