Standard Specification for Semiconductor Device Passivation Opening Layouts
1.1 This specification covers standard semiconductor device passivation opening layouts for various tape automated bonding interconnection technologies.
1.2 This specification establishes the nominal passivation opening dimensions, nominal passivation, opening spacing, nominal corner passivation opening offset, minimum scribe guard and minimum die size for the most common input/ output counts within each technology.
1.3 This specification is extendable to other interconnection technologies if the passivation opening and spacing are adjusted in such a way that the progression is not modified.
1.4 The values stated in SI units are to be regarded as the standard. The values given in parentheses are for information only.
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